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Ewha University
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Yoon, Myung Kuk Assistant Professor

Department of Computer Science and Engineering

윤명국 프로필 사진 
He received his BS degree in Computer Engineering and Computational Mathematics from Washington State University (WSU), Pullman, Washington, USA, in 2011, and his Ph.D. degree in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 2018. He is currently working as an assistant professor with the Department of Computer Science and Engineering, Ewha Womans University. Prior to joining Ewha Womans University, he worked as a software developer at Samsung Inc. His research interests include GPU micro-architecture, machine learning accelerators, and parallel programming.
  • Asan Engineering Building #105-3
  • 0232773819
  • Research Interests
    • Graphics Processing Unit (GPU) Micro-Architecture, Parallel Programming (GPGPU, OpenCL, CUDA, AVX, AVX512), Computer Architecture
Research Record
  • Conflict-aware compiler for hierarchical register file on GPUs Journal of Systems Architecture, 2024, v.149, 103099
    SCIE Scopus dColl.
  • SAVector: Vectored Systolic Arrays IEEE Access, 2024, v.12, 44446-44461
    SCIE Scopus dColl.
  • Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization IEEE Embedded Systems Letters, 2024, v.16 no.2, 206-209
    SCIE Scopus dColl.
  • 멀티 테넌트 환경에서 Multi-Instance 그래픽 프로세싱 유닛을 활용한 워크로드 단위 공정성 분석 연구 전자공학회논문지, 2023, v.60 no.4, 11-23
    KCI dColl.
  • 차세대 메모리 소자를 적용한 신경망 처리장치의 성능 분석 전자공학회논문지, 2023, v.60 no.7, 30-39
    KCI dColl.
  • Analyzing GCN Aggregation on GPU IEEE ACCESS, 2022, v.10, 113046-113060
    SCIE Scopus dColl.
  • CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs IEEE Embedded Systems Letters, 2022
    SCIE Scopus dColl.
  • GhostLeg: Selective Memory Coalescing for Secure GPU Architecture IEEE ACCESS, 2022, v.10, 111449-111462
    SCIE Scopus dColl.
  • TEA-RC: Thread Context-Aware Register Cache for GPUs IEEE ACCESS, 2022, v.10, 82049-82062
    SCIE Scopus dColl.
  • REACT: Scalable and High-Performance Regular Expression Pattern Matching Accelerator for In-Storage Processing IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2020, v.31 no.5, 1137-1151
    SCIE Scopus dColl.
  • [학술지논문] Adaptive Kernel Merge and Fusion for Multi-Tenant Inference in Embedded GPUs IEEE EMBEDDED SYSTEMS LETTERS, 2024, v.16 no.4 , 421-424
    SCIE
  • [학술지논문] Conflict-aware compiler for hierarchical register file on GPUs JOURNAL OF SYSTEMS ARCHITECTURE, 2024, v.149 no.- , 103099-103099
    SCIE
  • [학술지논문] SAVector: Vectored Systolic Arrays IEEE ACCESS, 2024, v.12 no.- , 44446-44461
    SCIE
  • [학술지논문] Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization IEEE EMBEDDED SYSTEMS LETTERS, 2024, v.16 no.2 , 206-209
    SCIE
  • [학술지논문] Fairness Analysis of Multi-tenant Applications on Multi-Instance GPUs 전자공학회논문지, 2023, v.60 no.4 , 11-23
    KCI
  • [학술지논문] Performance Analysis of Neural Processing Units with Emerging Memory Technologies 전자공학회논문지, 2023, v.60 no.7 , 30-39
    KCI
  • [학술지논문] Analyzing GCN Aggregation on GPU IEEE ACCESS, 2022, v.10 no.0 , 113046-113060
    SCIE
  • [학술지논문] CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs IEEE EMBEDDED SYSTEMS LETTERS, 2022, v.14 no.4 , 187-190
    SCIE
  • [학술지논문] GhostLeg: Selective Memory Coalescing for Secure GPU Architecture IEEE ACCESS, 2022, v.10 no.0 , 111449-111462
    SCIE
  • [학술지논문] TEA-RC: Thread Context-Aware Register Cache for GPUs IEEE ACCESS, 2022, v.10 no.0 , 82049-82062
    SCIE
  • [학술지논문] REACT: Scalable and High-Performance Regular Expression Pattern Matching Accelerator for In-Storage Processing IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2020, v.31 no.5 , 1137-1151
    SCI
  • [학술발표] HyMM: A Hybrid Sparse-Dense Matrix Multiplication Accelerator for GCNs Design, Automation and Test in Europe Conference (DATE 2025), 프랑스, Lyon, 2025-03-31 Design, Automation and Test in Europe Conference (DATE 2025), 2025
  • [학술발표] Marching Page Walks: Batching and Concurrent Page Table Walks for Enhancing GPU Throughput The 31st International IEEE Symposium on High Performance Computer Architecture (HPCA 2025), 미국, 2025-03-05 The 31st International IEEE Symposium on High Performance Computer Architecture (HPCA 2025), 2025
  • [학술발표] Warped-Compaction: Maximizing GPU Register File Bandwidth Utilization via Operand Compaction The 31st International IEEE Symposium on High Performance Computer Architecture (HPCA 2025), 미국, 2025-03-05 The 31st International IEEE Symposium on High Performance Computer Architecture (HPCA 2025), 2025
  • [학술발표] DEPrune: Depth-wise Separable Convolution Pruning for Maximizing GPU Parallelism The 38th Annual Conference on Neural Information Processing Systems (NeurIPS 2024), 캐나다, 2024-12-13 The 38th Annual Conference on Neural Information Processing Systems (NeurIPS 2024),, 2024
  • [학술발표] VitBit: Enhancing Embedded GPU Performance for AI Workloads through Register Operand Packing 53rd International Conference on Parallel Processing, 스웨덴, 2024-08-15 53rd International Conference on Parallel Processing, 2024
  • [학술발표] Balanced Column-Wise Block Pruning for Maximizing GPU Parallelism The 37th Association for the Advancement of Artificial Intelligence (AAAI-23), 미국, 워싱턴DC, 2023-02-09 The 37th Association for the Advancement of Artificial Intelligence (AAAI-23), 2023
  • [학술발표] Early-Adaptor: An Adaptive Framework For Proactive UVM Memory Management 2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2023), 미국, Raleigh, NC, 2023-04-25 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2023), 2023
  • [학술발표] INTERPRET: Inter-Warp Register Reuse for GPU Tensor Core The 32nd International Conference on Parallel Architectures and Compilation Techniques, 오스트리아, 2023-10-25 The 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023
  • [학술발표] Warped-MC: An Efficient Memory Controller Scheme for Massively Parallel Processors 52nd International Conference on Parallel Processing (ICPP 2023), 미국, 2023-08-09 52nd International Conference on Parallel Processing (ICPP 2023), 2023
  • [학술발표] Reconstructing Out-of-Order Issue Queue 2022 IEEE/ACM International Symposium on Microarchitecture (MICRO 2022), 미국, 시카고, 2022-10-03 IEEE/ACM International Symposium on Microarchitecture (MICRO 2022), 2022
  • [지적재산권] 가지치기 비율을 고려한 그래픽 프로세싱 유닛의 스레드 블록을 스케줄링 하는 방법 및 장치 Domestic : Patent , Registration , 10-2751159, 2025
  • [지적재산권] 오퍼랜드 컬렉터를 미리 할당하여 레지스터 파일을 효율적으로 사용하는 전자 장치 및 그 동작 방법 Domestic : Patent , Registration , 10-2713738, 2024
  • [지적재산권] 프로세서의 레지스터 캐시 인덱스 결정 방법 및 이를 수행하는 전자 장치 Domestic : Patent , Registration , 10-2663496, 2024
  • [지적재산권] 스토리지 시스템 및 이의 동작 방법(STORAGE SYSTEM AND OPERATING METHOD THEREOF) Domestic : Patent , Registration , 10-2276912, 2021
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Courses

  • 2025-1st

    • Digital Logic Design

    • Digital Logic Design Laboratory

    • Digital Logic Design Laboratory

    • Advanced Computer Architecture

  • 2024-2nd

    • Computer Architecture

      • Subject No 20493Class No 02
      • 2Year ( 3Credit , 3Hour) Wed 7~7 (ENG A107) , Fri 7~7 (ENG A107)
      • Major Requisite
        • 영문계획안 Syllabus(URL)

    • Embedded Systems and Labs

    • S/W Self-Designed Study Ⅰ

      • Subject No 38082Class No 02
      • Year ( 3Credit

    • S/W Self-Designed Study Ⅱ

      • Subject No 38083Class No 02
      • Year ( 3Credit

  • 2024-1st

    • Computer Programming and Labs

    • Digital Logic Design

    • Digital Logic Design Laboratory

    • Digital Logic Design Laboratory

    • S/W Self-Designed Study Ⅰ

      • Subject No 38082Class No 02
      • 4Year ( 3Credit

    • S/W Self-Designed Study Ⅱ

      • Subject No 38083Class No 02
      • 4Year ( 3Credit

  • 2023-2nd

    • Computer Architecture

      • Subject No 20493Class No 05
      • 2Year ( 3Credit , 3Hour) Tue 6~6 (POSCO465) , Thu 4~4 (POSCO465)
      • Major Requisite
        • 영문계획안 Syllabus(URL)

    • Capstone Design Project A 강의 계획서 상세보기

      • Subject No 36506Class No 01
      • 3Year ( 3Credit , 4.5Hour) Tue 4~4 (ENG A) , Fri 5~6 (101)
        • Syllabus(File)

    • Embedded Systems and Labs

    • S/W Self-Designed Study I

      • Subject No 38082Class No 02
      • 4Year ( 3Credit

    • S/W Self-Designed Study II

      • Subject No 38083Class No 02
      • 4Year ( 3Credit

    • Computer Architecture

  • 2023-1st

  • 2022-2nd

    • Computer Architecture

      • Subject No 20493Class No 02
      • 2Year ( 3Credit , 3Hour) Wed 7~7 (ENG A107) , Fri 7~7 (ENG A107)
      • Major Requisite
        • 영문계획안 Syllabus(URL)

    • Capstone Design Project A

      • Subject No 36506Class No 01
      • 3Year ( 3Credit , 4.5Hour) Tue 4~4 (ENG A) , Fri 5~6 (101)
        • Syllabus(File)

    • Embedded Systems and Labs

  • 2022-1st

    • Digital Logic Design

    • Digital Logic Design Laboratory

    • Digital Logic Design Laboratory

    • Software-based Convergence System Design 강의 계획서 상세보기

      • Subject No 36503Class No 01
      • 2Year ( 3Credit , 4.5Hour) Mon 1~1 (ENG A101) , Mon 2~3 (ENG A125-2)
      • Major Requisite

    • Software-based Convergence System Design

    • Capstone Design Project B

      • Subject No 36507Class No 01
      • 4Year ( 3Credit , 4.5Hour) Tue 4~4 (ENG A) , Fri 5~6 (101)
        • Syllabus(File)

    • Computer Architecture

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Academic Background

YONSEI UNIVERSITY 공학박사(전기전자공학과)

Washington State University Bachelor of Science in Computer Engineering(School of Engineering and Computer Science)

Work Experience

삼성전자 2018-03-01 ~ 2021-02-28

Department Chair, Software 2023-03-01 ~ 2025-01-31

Department Chair, Specialized Program in Software Convergence 2023-03-01 ~ 2025-01-31

List